发明名称 |
Method of manufacturing vertical power device |
摘要 |
A semiconductor apparatus comprising a vertical type semiconductor device having a first conducting type semiconductor substrate, a drain layer formed on the surface of the semiconductor substrate, a drain electrode formed on the surface of the drain layer, a second conducting type base layer selectively formed on the surface of the semiconductor substrate opposite to the drain layer, a first conducting type source layer selectively formed on the surface of the second conducting type base layer, a source electrode formed on the first conducting type source layer and the second conducting type base layer, and a gate electrode formed in contact with the first conducting type source layer, the second conducting type base layer and the semiconductor substrate through a gate insulating film and a lateral semiconductor device having an insulating layer formed in a region of the surface of the semiconductor substrate different from the second conducting type base layer, and a polycrystalline semiconductor layer formed on the insulating layer and having a first conducting type region and a second conducting type region, wherein the first conducting type source layer of the vertical semiconductor device and the first conducting type region of the polycrystalline semiconductor layer are simultaneously formed.
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申请公布号 |
US5985708(A) |
申请公布日期 |
1999.11.16 |
申请号 |
US19970816596 |
申请日期 |
1997.03.13 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
NAKAGAWA, AKIO;SUGIYAMA, NAOHARU;MATSUDAI, TOMOKO;YASUHARA, NORIO;KUROBE, ATSUSI;FUNAKI, HIDEYUKI;KAWAGUCHI, YUSUKE;YAMAGUCHI, YOSHIHIRO |
分类号 |
H01L27/12;H01L29/73;H01L29/739;H01L29/786;(IPC1-7):H01L21/824 |
主分类号 |
H01L27/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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