发明名称 RRAM retention by depositing Ti capping layer before HK HfO
摘要 The present disclosure relates to a resistance random access memory (RRAM) device architecture where a Ti metal capping layer is deposited before the deposition of the HK HfO resistance switching layer. Here, the capping layer is below the HK HfO layer, and hence no damage will occur during the top RRAM electrode etching. The outer sidewalls of the capping layer are substantially aligned with the sidewalls of the HfO layer and hence any damage that may occur during future etching steps will happen at the outer side walls of the capping layer that are positioned away from the oxygen vacancy filament (conductive filament) in the HK HfO layer. Thus the architecture in the present disclosure, improves data retention.
申请公布号 US9385316(B2) 申请公布日期 2016.07.05
申请号 US201414196416 申请日期 2014.03.04
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Liao Yu-Wen;Chu Wen-Ting;Ong Tong-Chern
分类号 H01L45/00;H01L27/24 主分类号 H01L45/00
代理机构 Eschweiler & Associates, LLC 代理人 Eschweiler & Associates, LLC
主权项 1. A resistance random access memory (RRAM) device comprising: a variable resistance dielectric layer having a top surface and a bottom surface; a cathode disposed over the variable resistance dielectric layer and abutting the top surface; a metal capping layer disposed below the variable resistance dielectric layer and abutting the bottom surface; and an anode disposed below the metal capping layer at a location vertically between the metal capping layer and a semiconductor body, wherein the anode comprises a bump protruding outward from a lower surface of the anode that faces away from the metal capping layer.
地址 Hsin-Chu TW