| 主权项 |
1. A system for isolating a first power domain of an integrated circuit (IC) from a second power domain of the IC, the system comprising:
a first multiplexer having a first two-bit input terminal for receiving first and second bit signals, a second two-bit input terminal for receiving third and fourth bit signals, a select terminal for receiving an isolation enable signal, and a two-bit output terminal for outputting fifth and sixth bit signals; and an isolation circuit, comprising:
a logic gate connected to the two-bit output terminal of the first multiplexer for receiving the fifth and sixth bit signals, and for generating an enable signal;a latch having a first input terminal for receiving an input signal, an enable terminal connected to the logic gate for receiving the enable signal, and an output terminal for outputting a latched signal; anda second multiplexer having a first input terminal for receiving the input signal, a second input terminal for receiving a logic low signal, a third input terminal for receiving a logic high signal, a fourth input terminal connected to the latch for receiving the latched signal, a two-bit select terminal connected to the first multiplexer for receiving the fifth and sixth bit signals, and an output terminal for outputting an isolation signal,wherein the isolation circuit is configurable for outputting at least one of the input signal, the logic low signal, the logic high signal, and the latched signal as the isolation signal for isolating the first power domain from the second power domain based on the fifth and sixth bit signals. |
