发明名称 Method of securing the test mode of an integrated circuit via intrusion detection
摘要 An electronic circuit, including: a logic circuit having a plurality of logic cells; storage cells able to form a shift register, able to be connected to the logic cells; a connection control module having an input for the reception of an identification key, the module connecting the storage cells so as to form a test shift register when the receive input receives a valid identification key, and the module connecting the storage cells so as to form randomly a diversion circuit when the input does not receive a valid identification key. The invention allows the electronic circuit to be protected against fraudulent access in read or write mode. The invention also relates to a smart card including this electronic circuit.
申请公布号 US2005172184(A1) 申请公布日期 2005.08.04
申请号 US20050046216 申请日期 2005.01.28
申请人 BANCEL FREDERIC;HELY DAVID 发明人 BANCEL FREDERIC;HELY DAVID
分类号 G01R31/317;G01R31/3185;G06F12/14;G06F21/00;(IPC1-7):G06F7/38;G01R31/28;H03K19/173 主分类号 G01R31/317
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