Diffusion topography engineering for high performance CMOS fabrication

摘要

Semiconductor structures are formed using diffusion topography engineering (DTE). A preferred method includes providing a semiconductor substrate, forming trench isolation regions that define a diffusion region, performing a DTE in a hydrogen-containing ambient on the semiconductor substrate, and forming a MOS device in the diffusion region. The DTE causes silicon migration, forming a rounded or a T-shaped surface of the diffusion regions. The method may further include recessing a portion of the diffusion region before performing the DTE. The diffusion region has a slanted surface after performing the DTE.