发明名称 パワー半導体モジュール
摘要 PROBLEM TO BE SOLVED: To suppress deviation in a switching timing, and reduce a size in a longitudinal direction.SOLUTION: In a power semiconductor module in which an IGBT and a diode are provided to an U-phase of a three-phase inverter circuit, a part where a P-terminal is electrically connected, of a pattern 2Ua is arranged on a line-symmetrical center CL1 between front ends of QUUa and FWDUUa and rear ends of QUUb and FWDUUb, and between right ends of QUUa and QUUb and left ends of FWDUUa and FWDUUb. A part where an U-terminal is electrically connected, of a pattern 2Ub is arranged on line-symmetrical centers CL1, CL2, and CL3 between a front end of QULa and a rear end of QULb, and between right and left ends of QULa and QULb. A part where an N-terminal is electrically connected, of a pattern 2Uc is arranged on line-symmetrical center lines CL2 and CL3 between a rear end of FWDULa and a front end of FWDULb, and between right and left ends of FWDULa and FWDULb.
申请公布号 JP5973833(B2) 申请公布日期 2016.08.23
申请号 JP20120175515 申请日期 2012.08.08
申请人 日本インター株式会社 发明人 根本 康志
分类号 H01L25/07;H01L23/473;H01L25/18;H02M7/48 主分类号 H01L25/07
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