发明名称 INSTRUCTION AND LOGIC FOR IDENTIFYING INSTRUCTIONS FOR RETIREMENT IN A MULTI-STRAND OUT-OF-ORDER PROCESSOR
摘要 A processor includes a first logic to execute an instruction stream out-of-order, the instruction stream divided into a plurality of strands, the instruction stream and each strand ordered by program order (PO). The processor also includes a second logic to determine an oldest undispatched instruction in the instruction stream and store an associated PO value of the oldest undispatched instruction as an executed instruction pointer. The instruction stream includes dispatched and undispatched instructions. The processor also includes a third logic to determine a most recently retired instruction in the instruction stream and store an associated PO value of the most recently retired instruction as a retirement pointer, a fourth logic to select a range of instructions between the retirement pointer and the executed instruction pointer, and a fifth logic to identify the range of instructions as eligible for retirement.
申请公布号 US2016314000(A1) 申请公布日期 2016.10.27
申请号 US201315103765 申请日期 2013.12.23
申请人 Intel Corporation 发明人 Kosarev Nikolay;Shishlov Sergey Y.;Iyer Jayesh;Butuzov Alexander V.;Babayan Boris A.;Kluchnikov Andrey
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
代理机构 代理人
主权项 1. A processor, comprising: a first logic to execute an instruction stream out-of-order, the instruction stream divided into a plurality of strands, the instruction stream and each strand ordered by program order (PO); a second logic to determine an oldest undispatched instruction in the instruction stream and store an associated PO value of the oldest undispatched instruction as an executed instruction pointer, wherein the instruction stream includes dispatched and undispatched instructions; a third logic to determine a most recently retired instruction in the instruction stream and store an associated PO value of the most recently retired instruction as a retirement pointer; a fourth logic to select a range of instructions between the retirement pointer and the executed instruction pointer; and a fifth logic to identify the instructions in the range selected in the fourth logic as eligible for retirement.
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