发明名称 半導体ストレージ
摘要 A first objective is to reduce performance degradation of a semiconductor storage resulting from address translation. A second objective is to reduce an increase in the manufacturing cost of the semiconductor storage resulting from address translation. A third objective is to provide the semiconductor storage with high reliability. To accomplish the above objectives, a storage area of a nonvolatile memory included in the semiconductor storage is segmented into multiple blocks, and each of the blocks is segmented into multiple pages. Then, an erase count is controlled on a page basis (109), and address translation is controlled on a block basis (108).
申请公布号 JP6018696(B2) 申请公布日期 2016.11.02
申请号 JP20150502613 申请日期 2013.02.27
申请人 株式会社日立製作所 发明人 黒土 健三;三浦 誓士;内垣内 洋
分类号 G06F12/02;G06F12/00;G06F12/16 主分类号 G06F12/02
代理机构 代理人
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