Nonvolatile memory device

摘要

With the proposed page buffer, noise or eventual voltage surges on the source line do not cause fails of program operations and it is finally made possible to store a bit to be written in a cell of a page of the memory device while a program operation is in progress on a different page with the fullest reliability.
The cache latch is isolated from the source line during program operations and during program-verify operations. Moreover, the main latch and the cache latch are not directly connected, but are coupled through a temporary latch that is used for transferring data from the cache latch to the main latch. Eventual noise or voltage surges present on the source line of a selected bitline cannot flip the bit stored in the cache latch because the cache latch is not connected to the source line during a program or program-verify operations, but the bit stored therein is transferred to the source line through a temporary latch.