| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a system and a method for effectively implementing an IQ signal generator. <P>SOLUTION: A system and a method for effectively implementing an IQ signal generator includes a master latch that generates an I signal and a slave latch that generates a Q signal. The master latch includes a master data circuit, a master latch circuit, and a master clock circuit. The slave latch includes a slave data circuit, a slave latch circuit, and a slave clock circuit. A cross-coupled current-source technique is used to compensate for certain device mismatches. A current source A generates an operating current A for the master clock circuit, the master data circuit, and the slave data circuit, and a current source B generates an operating current B for the slave clock circuit, the master latch, and the slave latch. In addition, resistors are utilized to provide fixed impedances to compensate for device mismatches between components in the master clock circuit and the slave clock circuit. <P>COPYRIGHT: (C)2009,JPO&INPIT |
