Negotiation between multiple processing units for switch mitigation

摘要

A method for maintaining data and clock line synchronization, which may include a clock line that may be driven high after a clock line falling edge to mitigate a clock error. Additionally, the clock error may be mitigated by maintaining a saturated state of a device. Furthermore, a register may be connected to a microcontroller and/or a graphical processing unit to negotiate control of a switch and a bus.

主权项

1. A method, comprising:
detecting a pre-determined event, wherein the pre-determined event signals to change a state of at least a clock line and a data line in an electronic system; changing the state of the clock line in an electronic system responsive to the detection of the pre-determined event; and delaying the change of the state of the data line responsive to the detection of the pre-determined event; wherein delaying the change of the state of the second data line includes beginning a countdown of a counter in response to changing the state of the clock line.