发明名称 |
Method of fabricating gate |
摘要 |
A method for fabricating a gate. A gate oxide layer is formed on a substrate. A first doped polysilicon layer is formed on the gate oxide layer. A second doped polysilicon layer on the first doped polysilicon layer. A third doped polysilicon layer over the second polysilicon layer. The second doped polysilicon layer has a grain size larger than a grain size of both the first doped polysilicon layer and the third dope polysilicon layer.
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申请公布号 |
US6150251(A) |
申请公布日期 |
2000.11.21 |
申请号 |
US19990235660 |
申请日期 |
1999.01.22 |
申请人 |
UNITED MICROELECTRONICS CORP |
发明人 |
YEW, TRI-RUNG;LUR, WATER |
分类号 |
H01L21/28;H01L29/49;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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