发明名称 Semiconductor device including first interface and second interface as an upper surface of a convex protruded from first interface and manufacturing device thereof
摘要 A semiconductor device includes a first n-type semiconductor layer, a p-type semiconductor layer, a second n-type semiconductor layer and a trench. The first n-type semiconductor layer includes a first interface and a second interface. The second interface forms an upper surface of a convex protruded from the first interface. The p-type semiconductor layer is stacked on the first n-type semiconductor layer and includes a first region stacked on the first interface and a second region stacked on the second interface. The first region is uniformly continuous with the second region. The second n-type semiconductor layer is stacked on the p-type semiconductor layer. The trench is depressed from the second n-type semiconductor layer through the p-type semiconductor layer into the convex of the first n-type semiconductor layer.
申请公布号 US9349856(B2) 申请公布日期 2016.05.24
申请号 US201414179412 申请日期 2014.02.12
申请人 TOYODA GOSEI CO., LTD. 发明人 Oka Toru
分类号 H01L29/78;H01L29/66;H01L29/423;H01L29/10;H01L29/40;H01L29/417;H01L29/45;H01L29/06;H01L29/08;H01L29/20 主分类号 H01L29/78
代理机构 McGinn IP Law Group, PLLC. 代理人 McGinn IP Law Group, PLLC.
主权项 1. A semiconductor device, comprising: a substrate; a first n-type semiconductor layer that is located above the substrate and includes a first interface and a second interface, wherein the first interface is extended along the substrate and the second interface forms an upper surface of a convex protruded from the first interface; a p-type semiconductor layer that is stacked on the first n-type semiconductor layer and includes a first region stacked on the first interface and a second region stacked on the second interface, wherein the first region is uniformly continuous with the second region; a second n-type semiconductor layer that is stacked on the p-type semiconductor layer; a trench that is depressed from the second n-type semiconductor layer through the p-type semiconductor layer into the convex of the first n-type semiconductor layer; and an insulating film disposed on an upper surface of the second n-type semiconductor layer and a bottom surface of the trench.
地址 Kiyosu-Shi, Aichi-Ken JP