DUAL LINER SILICIDE

摘要

A method for fabricating a dual silicide device includes growing source and drain (S/D) regions for an N-type device, forming a protection layer over a gate structure and the S/D regions of the N-type device and growing S/D regions for a P-type device. A first dielectric layer is conformally deposited and portions removed to expose the S/D regions. Exposed S/D regions for the P-type device are silicided to form a liner. A second dielectric layer is conformally deposited. A dielectric fill is formed over the second dielectric layer. Contact holes are opened through the second dielectric layer to expose the liner for the P-type device and expose the protection layer for the N-type device. The S/D regions for the N-type device are exposed by opening the protection layer. Exposed S/D regions adjacent to the gate structure are silicided to form a liner for the N-type device. Contacts are formed.

主权项

1. A dual silicide complementary metal oxide semiconductor (CMOS) device comprising:
a P-type device including source and drain regions on opposite sides of a gate structure and being disposed over a substrate, the source and drain regions including a horizontal portion and a vertical portion; a first silicided liner formed over the horizontal portion and the vertical portion of the source and drain regions of the P-type device; an N-type device including source and drain regions on opposite sides of a gate structure and being disposed over the substrate, the source and drain regions including a horizontal portion and a vertical portion; a second silicided liner formed on a portion of the horizontal portion of the source and drain regions of the N-type device; a high-k dielectric layer covering the vertical portion and at least a portion of the horizontal portion of the source and drain regions of the P-type device and the N-type device; a protection layer covering the vertical portion and at least a portion of the horizontal portion of the source and drain regions of the N-type device; first contacts connecting to the first silicided liner through the high-k dielectric layer; and second contacts connecting to the second silicided liner through the high-k dielectric layer and the protection layer.