发明名称 |
METHOD AND DEVICE FOR FREQUENCY SYNTHESIS USING A PHASE LOCKED LOOP |
摘要 |
The invention concerns a frequency synthesis method using a phase locked loop, including a phase comparator (3), comprising in particular a step which consists in switching from a fractional frequency division operating mode to a total frequency division operating mode after said loop operational stabilisation time or delay has elapsed. Said method is characterised in that it consists in operating said operating mode switching by masking or eliminating periodically part of the pulses of the reference (Sref) and comparison (Scomp) signals before applying them to the phase comparator (3) input .
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申请公布号 |
WO0201721(A1) |
申请公布日期 |
2002.01.03 |
申请号 |
WO2001FR02064 |
申请日期 |
2001.06.28 |
申请人 |
ALCATEL;BURNET, ARNAUD;RIEUBON, SEBASTIEN |
发明人 |
BRUNET, ARNAUD;RIEUBON, SEBASTIEN |
分类号 |
H03L7/089;H03L7/197;(IPC1-7):H03L7/18 |
主分类号 |
H03L7/089 |
代理机构 |
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主权项 |
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地址 |
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