发明名称 VARIABLE CLOCK PHASE GENERATION METHOD AND SYSTEM
摘要 A variable phase generator is disclosed that includes a delay line with an input, and output, and a delay lone control signal input. A signal on the delay line output has a phase offset relative to the delay line input signal such that the phase offset is controlled by a digital offset signal. A phase detector process the input signal and the output signal to generate a phase detector output signal. A charge pump, responsive to the phase detector output signal, generates a charge pump output. A digital to analog converter receives and converts the digital offset signal to an analog offset signal. A control node is connected to the delay line control input, the charge pump, and the digital to analog converter, and is configured to receive and combine the charge pump output and the analog offset signal to create the delay line control signal.
申请公布号 US2016241250(A1) 申请公布日期 2016.08.18
申请号 US201514622706 申请日期 2015.02.13
申请人 Mindspeed Technologies, Inc. 发明人 Cops Wim F.
分类号 H03L7/081;H03K5/06 主分类号 H03L7/081
代理机构 代理人
主权项 1. A variable phase generator comprising: a delay line configured to: receive a delay line input signal at a delay line input;output a delay line output signal at a delay line output, the delay line output signal having a phase offset relative to the delay line input signal such that the phase offset is controlled by a digital offset signala delay line control input configured to receive a delay line control signal; a phase detector configured to receive and process the input signal and the output signal to generate a phase detector output signal representing a phase difference between the input signal and the output signal; a charge pump configured to receive the phase detector output signal and responsive to the phase detector output signal, generate and output a charge pump output; a digital to analog converter configured to: receive the digital offset signal the delay line output signal relative to the delay line input signal;convert the digital offset signal to an analog offset signal;output the analog offset signal; a control node connected to the delay line control input, the charge pump, and the digital to analog converter, the control node configured to receive and combine the charge pump output and the analog offset signal to create the delay line control signal.
地址 Newport Beach CA US