| 摘要 |
PURPOSE: A digital signal processor is provided to execute an integer calculation and a fixed-point calculation effectively. CONSTITUTION: The first external bus(31) is used as the first read data bus of n-bit. The first register(30) temporarily stores 'n' bit data from a memory through the first external bus(31). The first and second bit aligners(32,34) shift the 'n' bit data from the first register(30), and extend the data from 'n' bit to 'N+r' bit. The first multiplexer(36) supplies data of "N+r" bit on the first input port or data of "N+r" bit on the second input port to the first guard bits attaching unit(38) in accordance with a fixed-point/integer calculation. The first guard bits attaching unit(38) attaches a guard bit to the "N+r" bit data from the first multiplexer(36). The guard bit is set as '0' all or extends a sign of data. The second register(40) temporarily stores 'n' bit data from a memory being inputted through the first external bus(31). The second external bus(33) is used as the second read data bus. The second multiplexer(42) supplies one of the data out of n' bit data from the first external bus(31) being supplied to the first input port and n' bit data from the second external bus(33) being supplied to the second input port to the third register(44). The third register(44) temporarily stores the 'n' bit data from the second multiplexer(42). A multiplier(46) multiplies two of the data stored in the second and third registers(40,44).
|
