发明名称 Testing regularly structured logic circuits in integrated circuit devices
摘要 The test generation software takes advantage of the regularity of the structure without introducing significant changes to the test pattern generation software or to the manufacturing test tools. In this manner, the number of test patterns, the pattern data volume, and the length of the scan chains used for testing the imbedded repetitive structures is substantially reduced. The imbedded repetitive structures are tested by structuring and connecting the scan chain segments of the repeated structures in a way that permits identical test stimuli to be loaded into each copy of the repeated structure. A multiple input signature register or other such equivalent data compressing means provide the necessary data compression for reducing the volume of the test results that can be observed during scan by the tester to detect the presence of any fault that was observed.
申请公布号 US2002170009(A1) 申请公布日期 2002.11.14
申请号 US20010853106 申请日期 2001.05.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BARNHART CARL F.
分类号 G01R31/3185;(IPC1-7):G01R31/28 主分类号 G01R31/3185
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