Direct routing between address spaces through a nontransparent peripheral component interconnect express bridge

摘要

A system includes a PCIe controller coupled to a device through a nontransparent PCIe bridge. The controller is operable to direct I/O operations to the device on behalf of a host system. The system also includes a PCIe driver operable within the host system to generate I/O request descriptors that specify movement of data from the PCIe controller to the host system as well as from the host system to the PCIe controller. The PCIe controller processes the I/O request descriptors and determines which device is involved in the specified movement of data. The PCIe controller generates I/O commands that contain routing information for the device (e.g., memory addresses and steering information) to route the data between the memory address of the host system and the memory address of the device, bypassing a memory of the PCIe controller.

主权项

1. A system, comprising:
a Peripheral Component Interconnect Express controller coupled to a device through a nontransparent bridge and operable to direct input/output operations to the device on behalf of a host system, wherein the device comprises a solid state drive or a hard disk drive; and a Peripheral Component Interconnect Express driver operable within the host system to generate an input/output descriptor to directly transfer data between a memory address of the device and a memory address of the host system, wherein the input/output descriptor includes routing information for the device, wherein the controller is further operable to process the input/output descriptor from the driver, to generate a input/output command for the memory address of the device that includes the routing information for the device, to process a Transaction Layer Packet processing hint from the device that includes a steering tag to route the data, and to route the data between the memory address of the host system and the memory address of the device through the nontransparent bridge based on the routing information and the steering tag of the processing hint while bypassing a memory of the controller.