发明名称 |
Synthesis tuning system for VLSI design optimization |
摘要 |
In one aspect, a method for tuning input parameters to a synthesis program is provided which includes the steps of: (a) selecting a subset of parameter settings for the synthesis program based on a tuning optimization cost function; (b) individually running synthesis jobs in parallel for each of the parameter settings in the subset; (c) analyzing results from a current iteration and prior iterations, if any, using the cost function; (d) using the results from the current iteration and the prior iterations, if any, to create combinations of the parameter settings; (e) running synthesis jobs in parallel for the combinations of the parameter settings in a next iteration; and (f) repeating the steps (c)-(e) for one or more additional iterations or until an exit criteria has been met. |
申请公布号 |
US9529951(B2) |
申请公布日期 |
2016.12.27 |
申请号 |
US201414290886 |
申请日期 |
2014.05.29 |
申请人 |
International Business Machines Corporation |
发明人 |
Gristede George D.;Ziegler Matthew M. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
Michael J. Chang, LLC |
代理人 |
Hobson Mercedes L.;Michael J. Chang, LLC |
主权项 |
1. A method for tuning input parameters to a synthesis program, the method comprising the steps of:
(a) selecting a subset of parameter settings for the synthesis program based on a tuning optimization cost function; (b) individually running, using a processor device, synthesis jobs in parallel for each of the parameter settings in the subset; (c) analyzing, using the processor device, results from a current iteration and prior iterations, if any, using the tuning optimization cost function; (d) using the results from the current iteration and the prior iterations, if any, to create, using the processor device, combinations of the parameter settings; (e) running, using the processor device, synthesis jobs in parallel for the combinations of the parameter settings in a next iteration; and (f) repeating the steps (c)-(e) for one or more additional iterations or until an exit criteria has been met, wherein the synthesis program is a circuit synthesis program and the parameter settings are circuit synthesis parameter settings that are implemented in manufacturing integrated circuits, and wherein the exit criteria comprises one or more of: i) a predetermined number of iterations have been performed and ii) an iteration fails to improve results from one or more previous iterations. |
地址 |
Armonk NY US |