发明名称 OUTPUT CIRCUIT, ANALYSIS MODEL CREATION METHOD, PROGRAM AND RECORDING MEDIUM
摘要 PROBLEM TO BE SOLVED: To provide an analysis model creation method capable of creating an accurate analysis model of an output circuit including an emphasis circuit, a program and a recording medium.SOLUTION: An analysis model of an output buffer is created, which has a first IV characteristic and a first VT characteristic obtained by executing simulation using a net list of an output circuit with an emphasis circuit set in a disable state. A voltage control current source having the first IV characteristic is connected to an output pin, and an analysis model of the emphasis circuit is created, which has a fifth IV characteristic and a fifth VT characteristic obtained by executing simulation using a net list with the emphasis circuit set in an enable state. The operations of the analysis model of the output buffer and the analysis model of the emphasis circuit are synthesized to create an analysis model of an output circuit.SELECTED DRAWING: Figure 20
申请公布号 JP2016173733(A) 申请公布日期 2016.09.29
申请号 JP20150053497 申请日期 2015.03.17
申请人 MEGA CHIPS CORP 发明人 YAHATA YOSHINARI
分类号 G06F17/50 主分类号 G06F17/50
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