发明名称 Methods, apparatus and systems for facilitating RDMA operations with reduced doorbell rings
摘要 Methods, apparatus and systems for reducing usage of Doorbell Rings in connection with RDMA operations. A portion of system memory is employed as a Memory-Mapped Input/Output (MMIO) address space configured to be accessed via a hardware networking device. A Send Queue (SQ) is stored in MMIO and is used to facilitate processing of Work Requests (WRs) that are written to SQ entries by software and read from the SQ via the hardware networking device. The software and logic in the hardware networking device employ pointers identifying locations in the SQ corresponding to a next write WR entry slot and last read WR entry slot that are implemented to enable WRs to be written to and read from the SQ during ongoing operations under which the SQ is not emptied such that doorbell rings to notify the hardware networking device that new WRs have been written to the SQ are not required.
申请公布号 US9507752(B2) 申请公布日期 2016.11.29
申请号 US201213628771 申请日期 2012.09.27
申请人 Intel Corporation 发明人 Makhervaks Vadim;Keels Kenneth G.;Hausauer Brian S.;Oztaskin Ali S.
分类号 G06F15/167;G06F15/173 主分类号 G06F15/167
代理机构 Law Office of R. Alan Burnett, P.S 代理人 Law Office of R. Alan Burnett, P.S
主权项 1. A method for facilitating Remote Direct Memory Access (RDMA) operations via a computer having system memory, comprising: mapping a portion of system memory to a Memory-Mapped Input/Output (MMIO) address space configured to be accessed via a hardware networking device writing, via software, a plurality of Work Requests (WRs) to a Send Queue (SQ) in the MMIO address space; reading, via the hardware networking device, WRs from the SQ; employing a first pointer index identifying a WR entry slot at which a next WR entry is to be written employing, a second pointer index identifying a WR entry slot at which a last WR entry has been read: employing the first and second pointer indexes to determine when the SQ is empty, employing generation indicia indicating a generation status for each of a plurality of WR entries in the SQ; determining whether a WR entry is valid via use of the generation indicia for the WR entry; determining the SQ is not empty; writing one or more new WRs to the SQ; and not providing a notification to the hardware networking device that at least one new WR has been written to the SQ.
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