| 摘要 |
#CMT# #/CMT# A global data line pre-charge circuit (18') connected between a global data line pairs (1G,1GB), precharges the global data line pairs in response to the pre-charge control signal. A switching gate (30) is connected between the global data line pairs and a global data line pairs (2G,2GB). The data of the lines (2G,2GB), is amplified and output to the lines (1G,1GB) during writing operation. #CMT# : #/CMT# An independent claim is also included for data read/write method. #CMT#USE : #/CMT# Semiconductor memory device. #CMT#ADVANTAGE : #/CMT# Improves writing speed while decreasing the electric current that is exhausted at the time of the pre-charge operation. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The figure shows the circuit diagram of the semiconductor memory device. (Drawing includes non-English language text). 18' : global data line pre-charge circuit 30 : switching gate 1G,1GB,2G,2GB : global data line pairs. |
