发明名称 |
Circuit and Method for Controlling Charge Injection in Radio Frequency Switches |
摘要 |
A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated. |
申请公布号 |
US2016226478(A1) |
申请公布日期 |
2016.08.04 |
申请号 |
US201614987360 |
申请日期 |
2016.01.04 |
申请人 |
Peregrine Semiconductor Corporation |
发明人 |
Dribinsky Alexander;Kim Tae Youn;Kelly Dylan J.;Brindle Christopher N. |
分类号 |
H03K17/16;H03K17/687 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
1. A switch circuit, comprising:
(a) a plurality of switching transistors, each having a gate configured to be coupled to a gate control signal and a gate-controlled channel, coupled in series through their respective gate-controlled channels to selectively convey a signal from an input of the series coupled switching transistors to an output of the series coupled switching transistors, the series of switching transistors including:
(1) at least one resistively-isolated node, each resistively-isolated node located between a different pair of the plurality of switching transistors in series; and(2) at least one non-resistively-isolated node located adjacent to one of the plurality of switching transistors in series; and (b) a plurality of charge injection control transistors, each control transistor having a gate configured to be coupled to a charge injection control signal and a gate-controlled channel operatively coupled between a corresponding one of the at least one resistively-isolated node and the at least one non-resistively-isolated node to selectively convey injected charge from the corresponding resistively-isolated node to the at least one non-resistively-isolated node; wherein each control transistor selectively switches between an OFF-state and an ON-state in response to application of the charge injection control signal, and selectively controls conveyance of injection charge only while in the ON-state. |
地址 |
San Diego CA US |