发明名称 Semiconductor device evaluation method and apparatus, semiconductor device manufacturing control method, semiconductor device manufacturing method, and recording medium
摘要 A semiconductor device evaluation method and apparatus are provided which do not require a measurer to expend a great deal of time and effort even when measuring a large number of points, can prevent the occurrence of variations in measured values from measurer to measurer, and allow the measurement of the finished gate length even if gate pattern does not appear on the semiconductor device surface. There is also provided a semiconductor device manufacturing control method which applies such an evaluation method and apparatus to the control of semiconductor device manufacturing. For a plurality of insulated gate transistors with different channel lengths, an effective channel length (Leff), a gate capacitance (Cg), and a fringing capacitance (Cf) are determined by electrical measurement and/or calculation. The gate capacitance (Cg) and the effective channel length (Leff) are extended on a graph by extrapolation to determine gate-capacitance-vs.-effective-channel-length characteristics. Then, a gradient (A) of the characteristics is calculated to determine the finished gate length (Lg) for each of the plurality of insulated gate transistors from the equation, Lg=(Cg-Cf)/A.
申请公布号 US2002167034(A1) 申请公布日期 2002.11.14
申请号 US20010955080 申请日期 2001.09.19
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 YAMAGUCHI KENJI;AMISHIRO HIROYUKI;IGARASHI MOTOSHIGE
分类号 G01R31/26;H01L21/02;H01L21/66;H01L21/822;H01L21/8234;H01L27/04;H01L27/088;H01L29/78;(IPC1-7):H01L27/108;H01L29/76;H01L29/94;H01L31/119 主分类号 G01R31/26
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