发明名称 OUTPUT BUFFER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an output buffer circuit capable of satisfying constraints of an output resistance and constraints of rising and falling times of an output signal at the same time. SOLUTION: The output buffer circuit provided with an output terminal 13 for outputting the output signal Vout is provided with: a first output transistor Tr1 which is connected between the output terminal 13 and a power supply VDD and is made conductive in response to a gate voltage Vg1; a second output transistor Tr2 which is connected between the output terminal 13 and ground and is made conductive in response to a gate voltage Vg2; and a gate voltage adjustment circuit 1 which monitors the output signal Vout and adjusts the gate voltages Vg1, Vg2 on the basis of a result of the monitoring. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008028564(A) 申请公布日期 2008.02.07
申请号 JP20060197230 申请日期 2006.07.19
申请人 ROHM CO LTD 发明人 ITO TOMOMASA;YAMAMOTO ISAO
分类号 H03K19/0175 主分类号 H03K19/0175
代理机构 代理人
主权项
地址