FERROELECTRIC MEMORY EXPANSION FOR FIRMWARE UPDATES

摘要

In described examples, an integrated circuit includes a ferroelectric random access memory (FRAM) for storing firmware. The FRAM is constructed to selectively operate as a 2T2C FRAM memory in a normal operating mode, and as a 1T1C FRAM memory in an update mode. Updating of the stored firmware is performed by placing the FRAM in its update (1T1C) mode (56) and writing the updated code into alternate rows of the 1T1C half-cells at each of multiple memory locations (58), while the other 1T1C half-cells in the other alternate rows retain the original data. Following verification of the updated contents (60), the original data in the other half-cells are overwritten with the verified updated data (62), and the operating mode is changed back to the normal (2T2C) operating mode (70).