发明名称 DMA CONTROL METHOD AND DMA CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a DMA control method and a DMA controller that can increase the overall efficiency of DMA transfer by prioritizing channels (ch) appropriately by a simple structure. SOLUTION: Initial values of channel priority are set to '1' to '9' for ch1 to ch9, respectively. Set values of channel priority are set to '4' and '9' only for ch3 of high priority and for the others, respectively. When data transfer requests about ch1 to ch3 are received simultaneously, DMA transfer is first executed on ch1, whose priority is '1', and the priority of ch1 is changed to '9' (Fig. 6 (a)) to move up the other priority of ch in round robin fashion. The same processing is next performed on ch2 as on ch1 (Fig. 6 (b)). DMA transfer is finally executed on ch3, whose priority is '1', and the priority of ch3 is changed to '4' to move up the priority of ch4 to ch6 in round robin fashion (Fig. 6 (c)). COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008027353(A) 申请公布日期 2008.02.07
申请号 JP20060202105 申请日期 2006.07.25
申请人 MURATA MACH LTD 发明人 KAMATA KENICHI
分类号 G06F13/362;G06F13/28 主分类号 G06F13/362
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