发明名称 VERTICAL MOS SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a vertical MOS semiconductor device having a top gate structure which can enhance latch-up resistance quantity without increasing on voltage, and to provide a method of manufacturing the same. SOLUTION: In the vertical MOS semiconductor device having a top gate structure, the structure is configured in such a way that the body region of the other conductive type is disposed closer to the second opening section than to the end part of the gate oxide film while assuring the channel formation directly under a gate insulating film at a cathode layer. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008311540(A) 申请公布日期 2008.12.25
申请号 JP20070159642 申请日期 2007.06.18
申请人 FUJI ELECTRIC DEVICE TECHNOLOGY CO LTD 发明人 YOSHIKAWA ISAO
分类号 H01L29/739;H01L21/265;H01L21/336;H01L29/78 主分类号 H01L29/739
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