发明名称 FAULT TOLERANT SELECTION OF DIE ON WAFER
摘要 In a functional mode, the functional core logic of a die is connected to the input and output pads and the die performs its intended function. In a bypass mode, the input and output buffers of the functional core logic are disabled and pad sites of corresponding position between a first set of opposite sides and between a second set of opposite sides are electrically connected. In bypass mode the die is transformed into a simple interconnect structure between the first sides and between the second sides. The interconnect structure includes plural conductors extending substantially parallel to one another between the first sides and further plural conductors extending substantially parallel to one another between the second sides. While in bypass mode, signals from a tester apparatus can flow through the conductors between the first sides and between the second sides to access and test a selected die on a wafer.
申请公布号 US2007285113(A1) 申请公布日期 2007.12.13
申请号 US20070738033 申请日期 2007.04.20
申请人 发明人 WHETSEL LEE D.
分类号 G01R31/04 主分类号 G01R31/04
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