| 摘要 |
PROBLEM TO BE SOLVED: To solve the problems of circuit scale, power consumption, current consumption, the number of wiring for interface, noise and the like in a solid-state imaging device with an AD conversion apparatus mounted on the same chip. SOLUTION: A column AD circuit 25 having a voltage comparator 252 and a counter 254 is arranged for each vertical signal line 19. The voltage comparator 252 compares a pixel signal input via the vertical signal line 19 at each row control signal line 15 with a reference voltage RAMP, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter 254 counts a clock CK0 to measure the width of the pulse signal until the end of the comparison operation of the comparator 252, and stores a count value at the end of the comparison. A communication and timing controller 20 performs control so that, in a first process, the voltage comparator 252 performs a comparison operation on a reset component with the counter 254 performing a down-counting operation, and so that, in a second process, the voltage comparator 252 performs the comparison operation on a signal component with the counter 254 performing an up-counting operation. COPYRIGHT: (C)2010,JPO&INPIT
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