发明名称 LAYOUT OF DUMMY PATTERNS
摘要 A layout of dummy patterns on a wafer having a plurality of pads disposed thereon is described. The layout of the dummy patterns includes having a plurality of dummy patterns spaced apart from each other and enclosing the plurality of the pads. The plurality of dummy patterns also include a plurality of peripheral dummy patterns and a plurality of central dummy patterns, wherein a minimum distance between the plurality of the central dummy patterns and the plurality of the pads is greater a minimum distance between the plurality of the peripheral dumpy patterns and the plurality of the pads.
申请公布号 US2009008803(A1) 申请公布日期 2009.01.08
申请号 US20080211828 申请日期 2008.09.17
申请人 UNITED MICROELECTRONICS CORP. 发明人 HOU HSIN-MING
分类号 H01L23/528 主分类号 H01L23/528
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