THIN FILM TRANSISTOR ARRAY SUBSTRATE AND DISPLAY PANEL

摘要

The invention provides a thin film transistor (TFT) array substrate and a display panel. The TFT array substrate is disposed with multiple pixels arranged in an array. Each pixel includes first through third sub-pixels sequentially arranged along a first direction. The first through third sub-pixels are connected to a same scan line. The TFT array substrate further is disposed with first through third data lines sequentially arranged along the first direction. The first through third data lines respectively are for driving the first through third sub-pixels. The first sub-pixel includes first and second areas, the second sub-pixel includes third and fourth areas, and the third sub-pixel includes fifth and sixth areas, arranged along a second direction. A voltage difference between a sub-pixel electrode in the sixth area and a common electrode is different from a voltage difference between a sub-pixel electrode in the fifth area and the common electrode.

主权项

1. A thin film transistor array substrate, wherein the thin film transistor array substrate is disposed with a plurality of pixels arranged in an array, each of the plurality of pixels comprises a first sub-pixel, a second sub-pixel and a third sub-pixel sequentially arranged along a first direction, the first sub-pixel, the second sub-pixel and the third sub-pixel are connected to a same scan line, the thin film transistor array substrate further is disposed with a first data line, a second data line and a third data line sequentially arranged along the first direction, the first data line is configured for driving the first sub-pixel, the second data line is configured for driving the second sub-pixel, the third data line is configured for driving the third sub-pixel, the first sub-pixel comprises a first area and a second area arranged along a second direction, the second sub-pixel comprises a third area and a fourth area arranged along the second direction, the third sub-pixel comprises a fifth area and a sixth area arranged along the second direction, a voltage difference between a sub-pixel electrode in the sixth area and a common electrode is different from a voltage difference between a sub-pixel electrode in the fifth area and the common electrode.