发明名称 CLOCK SYNCHRONIZED MEMORY DEVICE
摘要 PURPOSE: A clock synchronized memory device is provided to make sure that data is synchronized with a clock. CONSTITUTION: The clock synchronized memory device comprises: a counter(2); a decoder(4) for outputting a predetermined selection signal according to a decoded counter output; and a delay element(6) which receives outputs of the counter and the decoder, and delays a clock when the selection signal is inputted. In operation, the counter counts '0'(00000) and then the decoder decodes the signal '0' and generates the selection signal corresponding to the decoded signal. The delay element delays the clock after the selection signal is inputted. When a delayed clock signal does not synchronize with data, the counter increases by 1. Then again, the decoder generates a signal corresponding to the signal 1 and the delay element delays a clock after the selection signal is inputted. Therefore, the foregoing operation is repeated by increasing the counter by 1 until the delayed signal is synchronized with data.
申请公布号 KR20000008776(A) 申请公布日期 2000.02.15
申请号 KR19980028740 申请日期 1998.07.15
申请人 HYUNDAI ELECTRONICS IND. CO.,LTD 发明人 JEON, CHUN U
分类号 G11C11/407;G11C7/10;G11C7/22;G11C8/18;G11C11/401;(IPC1-7):G11C11/407 主分类号 G11C11/407
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