| 摘要 |
Frequency spectrum spreading of a timing recovery circuit, such as a PLL, is controlled by periodically calculating each value for a divisor, M, of a fractional divider in the feedback path of the PLL. The fractional divider divides the output signal of a voltage-controlled oscillator (VCO) of the PLL by the divisor, M, and the value for divisor, M, is periodically updated based on a spreading profile. The output of the fractional divider and a reference clock signal are provided to a phase detector of the PLL so as to cause the PLL to slew the output frequency of the PLL in accordance with the spreading profile.
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