发明名称 Top layers of metal for integrated circuits
摘要 The present invention adds one or more thick layers of polymer dielectric and one or more layers of thick, wide metal lines on top of a finished semiconductor wafer, post-passivation. The thick, wide metal lines may be used for long signal paths and can also be used for power buses or power planes, clock distribution networks, critical signal, and re-distribution of I/O pads.
申请公布号 US8304907(B2) 申请公布日期 2012.11.06
申请号 US20070001676 申请日期 2007.12.12
申请人 LIN MOU-SHIUNG;CHOU CHIU-MING;CHOU CHIEN-KANG;MEGICA CORPORATION 发明人 LIN MOU-SHIUNG;CHOU CHIU-MING;CHOU CHIEN-KANG
分类号 H01L23/48;H01L23/52 主分类号 H01L23/48
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