| 摘要 |
PURPOSE: Analog-to-digital converter having a CMOS comparator reduces noises generated by a clock. CONSTITUTION: A first input terminal receives a first input signal(INPUT1). A second input terminal receives a second input signal(INPUT2). A first node generates a first output signal. A second node generates a second output signal. A first input circuit(10) receives a first input signal from the first input terminal. A second input circuit(20) receives a second input signal from the second input terminal. A reset transistor performs a conversion between the tracking mode and the sampling mode. A first latch circuit(50) is connected among a power voltage and the first and second nodes, and amplifies first and second output signals. A second latch circuit(60) is connected among the first and second nodes and the reset transistor. A bias circuit(40) provides a current. An output circuit(INV11,INV12) outputs first and second output signals amplified by the first and second latch circuits. The reset transistor receives a clock signal at its own gate, a source and drain of which are connected between the bias circuits. Thereby, the DAC's performance drop caused by a clock noise can be prevented.
|
