发明名称 |
Semiconductor device with trench structure and manufacturing method thereof |
摘要 |
The semiconductor device of the present invention includes a semiconductor layer made of a wide bandgap semiconductor, a trench that is selectively formed on a surface portion of the semiconductor layer and that defines a unit cell having a predetermined shape on the surface portion, and a surface electrode that is embedded in the trench so as to cover an upper surface of the unit cell and that forms a Schottky junction between the unit cell and the surface electrode, and side surfaces of the trench are formed of only a plurality of planes that have plane orientations crystallographically equivalent to each other. |
申请公布号 |
US9478673(B2) |
申请公布日期 |
2016.10.25 |
申请号 |
US201314650819 |
申请日期 |
2013.12.02 |
申请人 |
ROHM CO., LTD. |
发明人 |
Aketa Masatoshi;Yokotsuji Yuta |
分类号 |
H01L29/872;H01L29/66;H01L29/40;H01L21/02;H01L21/04;H01L21/285;H01L29/04;H01L29/06;H01L29/16;H01L29/20 |
主分类号 |
H01L29/872 |
代理机构 |
Hamre, Schumann, Mueller & Larson, P.C. |
代理人 |
Hamre, Schumann, Mueller & Larson, P.C. |
主权项 |
1. A semiconductor device comprising:
a semiconductor layer made of a wide bandgap semiconductor; a trench that is selectively formed on a surface portion of the semiconductor layer and that defines a unit cell having a predetermined shape on the surface portion; and a surface electrode that is embedded in the trench so as to cover an upper surface of the unit cell and that forms a Schottky junction between the unit cell and the surface electrode; side surfaces of the trench being formed of only a plurality of planes that have plane orientations crystallographically equivalent to each other, wherein the surface of the semiconductor layer having an active region in which the unit cell is disposed and an outer peripheral region that surrounds the active region, and the semiconductor device further includes: a removal region formed at the surface portion of the semiconductor layer in the outer peripheral region, a first conductivity type terminal structure formed so as to follow a bottom surface of the removal region, and a plurality of guard rings formed on an outer side, the outer side being toward an end surface of the semiconductor layer with respect to the terminal structure. |
地址 |
Kyoto JP |