发明名称 Buffer module for driving memory arrangements esp. for fast storage architecture, uses control unit for stopping writing of data from temporary write store to allow required data to be read via second data-interface
摘要 <p>A buffer module (1) has first data interface (2) for receiving a data to be written and for sending a read-data, a conversion unit (8) for parallelizing the received data and for sending the data to be serialized, a second data interface (5) for writing the parallelized data via a storage data bus into the storage assembly, a temporary write store (10) which temporarily stores the data to be written, and a control unit (12) which prevents writing of data from the temporary write store (10) via the second data interface, in order that the required data can be read via the second data-interface (5) in the buffer module (1), after reception of a data to be written via the first data interface according to a write command during a subsequent read command. An independent claim is included for a method of operating a buffer module.</p>
申请公布号 DE10309919(A1) 申请公布日期 2004.09.23
申请号 DE2003109919 申请日期 2003.03.07
申请人 INFINEON TECHNOLOGIES AG 发明人 BRAUN GEORG;RUCKERBAUER HERMANN
分类号 G06F3/06;G06F12/02;G06F12/08;G06F13/16;G11C11/00;(IPC1-7):G06F12/02 主分类号 G06F3/06
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