| 摘要 |
An access control method and a memory interface which enable access without a redundant bus cycle even to a burst memory having an addressing function different from the system side. A state machine is provided so that addressing mode information of a memory is read from a system internal register, and if burst access is performed at a system address by a predetermined addressing scheme of a bus master, when the addressing scheme of the memory internal address differs from a predetermined addressing scheme of the bus master, at an address transition position where there is a mismatch between the memory internal address and the system address, burst access is first terminated, burst transfer is resumed from an aligned address, and the remaining data are then accessed.
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