发明名称 Apparatus and method for storage and decompression of configuration data
摘要 An apparatus includes a plurality of cores and a fuse array. The plurality of cores is disposed on a die. The fuse array is disposed on the die and is coupled to each of the plurality of cores, where the fuse array includes a plurality of semiconductor fuses that are programmed with compressed configuration data for the each of the plurality of cores, and where the each of the plurality of cores accesses and decompresses all of the compressed configuration data upon power-up/reset, for initialization of elements within the each of the plurality of cores.
申请公布号 US9384140(B2) 申请公布日期 2016.07.05
申请号 US201514635006 申请日期 2015.03.02
申请人 VIA ALLIANCE SEMICONDUCTOR CO., LTD. 发明人 Henry G. Glenn;Jain Dinesh K.
分类号 G06F13/12;G11C17/18;G11C7/00;G11C8/00;G06F12/08;G11C17/16;G06F3/06;G06F9/44;G06F9/445;G06F12/06;G11C29/00;G06F11/10 主分类号 G06F13/12
代理机构 代理人 Huffman Richard K.;Huffman James W.
主权项 1. An apparatus for storing and providing configuration data to a multi-core processor, the apparatus comprising: a plurality of cores, disposed on a die; and a fuse array, disposed on said die and coupled to each of said plurality of cores, wherein said fuse array comprises a plurality of semiconductor fuses programmed with compressed configuration data for said each of said plurality of cores, and wherein said each of said plurality of cores accesses and decompresses all of said compressed configuration data upon power-up/reset, for initialization of elements within said each of said plurality of cores, and wherein said fuse array further comprises another plurality of semiconductor fuses programmed with uncompressed system hardware configuration data that is employed to initialize control circuit elements within said each of said plurality of cores, and wherein said compressed configured data is generated by compression of data within a virtual fuse array that corresponds to said plurality of cores.
地址 Shanghai CN