MULTI-DIMENSIONAL SLIDING WINDOW OPERATION FOR A VECTOR PROCESSOR

摘要

A logic circuit in a processor including a plurality of input registers, each for storing a vector containing data elements, a coefficient register for storing a vector containing N coefficients, an output register for storing a result vector, and an arithmetic unit configured to: obtain a pattern for selecting N data elements from the plurality of input registers, select a plurality of groups of N data elements from the plurality of input registers in parallel, wherein each group is selected in accordance with the pattern, and wherein each group is shifted with respect to a previous selected group, perform an arithmetic operation between each of the selected groups and the coefficients in parallel, and store results of the arithmetic operations in the output register.

主权项

1. A logic circuit in a processor comprising:
a plurality of input registers, each for storing an input vector containing data elements; a coefficient register for storing a coefficient vector containing N coefficients; an output register for storing a result vector; and an arithmetic unit configured to:
receive a pattern for selecting N data elements from the plurality of input registers;select a plurality of groups of N data elements from the plurality of input registers in parallel, wherein each group is selected in accordance with the pattern, and wherein each group is shifted with respect to a previous selected group;perform an arithmetic operation between each of the selected groups and the coefficients in parallel; andstore results of the arithmetic operations in the output register.