发明名称 MULTI CHIP PACKAGE
摘要 A multi-chip package is provided to prevent an increase of the width of a package by stacking semiconductor chips using only bumps, without using a bonding wire. A first dummy double-pattern die(250a) is positioned on a PCB. First and second semiconductor chips(210,220) are attached to bottom and upper surfaces of the first dummy double-pattern die. A circuit pattern of the first dummy double pattern die is electrically connected to the PCB by a first bump(260a). A second dummy double-pattern die(250b) is positioned on the first dummy double-pattern die. Third and fourth semiconductor chips(230,240) are attached to bottom and upper surfaces of the first dummy double-pattern die. A circuit pattern of the second dummy double pattern die is electrically connected to the circuit pattern of the first dummy double-pattern die by a second bump(260b). A solder ball(280) is formed on the bottom surface of the PCB.
申请公布号 KR20070094405(A) 申请公布日期 2007.09.20
申请号 KR20060025046 申请日期 2006.03.17
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KANG, TAE MIN
分类号 H01L23/12 主分类号 H01L23/12
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