发明名称 |
Harmonic time domain interleave to extend arbitrary waveform generator bandwidth and sample rate |
摘要 |
A harmonic time interleave (HTI) system, including a reference signal, a first summing component to produce a summed reference signal, a de-interleave block to receive an input signal and output a plurality of de-interleaved input signals, a plurality of digital-to-analog converters, each digital-to-analog converter configured to receive a corresponding one of a plurality of de-interleaved input signals and to output a corresponding analog signal, a plurality of mixing components, each mixing component configured to receive the summed reference signal and an analog signal from a corresponding of the plurality of digital-to-analog converters, and to output a corresponding mixed signal, and a second summing component configured to receive the mixed signal from each of the corresponding mixing components and to produce a substantially full-bandwidth analog signal representation of the input signal. |
申请公布号 |
US9407280(B1) |
申请公布日期 |
2016.08.02 |
申请号 |
US201514696857 |
申请日期 |
2015.04.27 |
申请人 |
TEKTRONIX, INC. |
发明人 |
Pickerd John J. |
分类号 |
H03M1/66;H03M1/74;H03M1/12 |
主分类号 |
H03M1/66 |
代理机构 |
Marger Johnson |
代理人 |
Marger Johnson |
主权项 |
1. A harmonic time interleave (HTI) system, comprising:
a sample clock configured to provide a reference signal; a first summing component configured to receive the reference signal at a first input, to receive a second signal at a second input, and to produce a summed reference signal; a de-interleave block configured to receive an input signal and output a plurality of de-interleaved input signals; a plurality of digital-to-analog converters, each digital-to-analog converter configured to receive a corresponding one of a plurality of de-interleaved input signals and to output a corresponding analog signal; a plurality of mixing components, each mixing component configured to receive the summed reference signal and an analog signal from a corresponding one of the plurality of digital-to-analog converters, and to output a corresponding mixed signal; and a second summing component configured to receive the mixed signal from each of the corresponding mixing components and to produce a substantially full-bandwidth analog signal representation of the input signal. |
地址 |
Beaverton OR US |