发明名称 CROSSING PIPELINED DATA BETWEEN CIRCUITRY IN DIFFERENT CLOCK DOMAINS
摘要 An integrated circuit implements a multistage processing pipeline, where control is passed in the pipeline with data to be processed according to the control. At least some of the different pipeline stages can be implemented by different circuits, being clocked at different frequencies. These frequencies may change dynamically during operation of the integrated circuit. Control and data to be processed according to such control can be offset from each other in the pipeline; e.g., control can precede data by a pre-set number of clock events. To cross a clock domain, control and data can be temporarily stored in respective FIFOs. Reading of control by the destination domain is delayed by a delay amount determined so that reading of control and data can be offset from each other by a minimum number of clock events of the destination domain clock, and control is read before data is available for reading.
申请公布号 US2016253151(A1) 申请公布日期 2016.09.01
申请号 US201615150177 申请日期 2016.05.09
申请人 Imagination Technologies Limited 发明人 Rozario Ranjit J.
分类号 G06F5/06;G06F15/00 主分类号 G06F5/06
代理机构 代理人
主权项 1. An integrated circuit, comprising: a first circuit clocked by a first clock; a second circuit clocked by a second clock, wherein the second clock and the first clock are configured to operate at different frequencies; a control queue coupled to receive an element of control information outputted from the first circuit, and to be read by the second circuit; a data queue coupled to receive an element of data outputted from the first circuit, wherein the element of control information and element of data are pipelined and offset from each other by a pre-set number of clock events of the first clock; and a counter operable to be initialized to an initial value and to be updated during subsequent clocking; wherein the second circuit is configured to read the element of control information from the control queue responsive to the value of the counter reaching a pre-determined value, and to read the element of data from the data queue after the pre-set number of clock events have occurred for the second clock after the control information is read.
地址 Kings Langley GB