发明名称 Battery state monitoring circuit
摘要 In a battery state monitoring circuit and a battery device using the same, even if a charge inhibiting signal is inputted to a microcomputer control terminal, a lock mode is prevented from occurring in which both a charge control transistor and a discharge control transistor are turned OFF and a battery voltage can not be supplied to a load. A circuit is structured such that even if the charge inhibiting signal is inputted to the microcomputer control terminal, in the case where the overcurrent voltage detection terminal comes to have the overcurrent detection voltage, the charge inhibiting signal of the microcomputer control terminal is cancelled.
申请公布号 US2002109484(A1) 申请公布日期 2002.08.15
申请号 US20020076744 申请日期 2002.02.14
申请人 YOKOTA HIROYASU;SAKURAI ATSUSHI 发明人 YOKOTA HIROYASU;SAKURAI ATSUSHI
分类号 H01M10/48;H02H7/18;H02J7/00;(IPC1-7):H02J7/00 主分类号 H01M10/48
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