| 发明名称 |
METHOD AND APPARATUS FOR VECTOR INDEX LOAD AND STORE |
| 摘要 |
An apparatus and method for performing vector index loads and stores. For example, one embodiment of a processor comprises: a vector index register to store a plurality of index values; a mask register to store a plurality of mask bits; a vector register to store a plurality of vector data elements loaded from memory; and vector index load logic to identify an index stored in the vector index register to be used for a load operation using an immediate value and to responsively combine the index with a base memory address to determine a memory address for the load operation, the vector index load logic to load vector data elements from the memory address to the vector register in accordance with the plurality of mask bits. |
| 申请公布号 |
US2016179526(A1) |
申请公布日期 |
2016.06.23 |
| 申请号 |
US201414581289 |
申请日期 |
2014.12.23 |
| 申请人 |
INTEL CORPORATION |
发明人 |
JHA ASHISH;VALENTINE ROBERT;OULD-AHMED-VALL ELMOUSTAPHA |
| 分类号 |
G06F9/30 |
主分类号 |
G06F9/30 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A processor comprising:
a vector index register to store a plurality of index values; a mask register to store a plurality of mask bits; a vector register to store a plurality of vector data elements loaded from memory; and vector index load logic to identify an index stored in the vector index register to be used for a load operation using an immediate value and to responsively combine the index with a base memory address to determine a memory address for the load operation, the vector index load logic to load vector data elements from the memory address to the vector register in accordance with the plurality of mask bits. |
| 地址 |
Santa Clara CA US |
