发明名称 |
Semiconductor device having fine pattern wiring lines integrally formed with contact plug and method of manufacturing same |
摘要 |
A semiconductor device and method are disclosed in which an interlayer insulating layer is patterned using multiple overlaying masks to define the geometry of contact plugs and corresponding wiring layers separated by fine pitches.
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申请公布号 |
US8361904(B2) |
申请公布日期 |
2013.01.29 |
申请号 |
US20100966110 |
申请日期 |
2010.12.13 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD.;LEE DONG-SEOK;CHUNG SEUNG-PIL;LEE JI-YOUNG |
发明人 |
LEE DONG-SEOK;CHUNG SEUNG-PIL;LEE JI-YOUNG |
分类号 |
H01L21/311 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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