| 摘要 |
The invention relates to a method for designing integrated circuits, especially to a description and testing of design rules, in which different design rules (6, 7) are intended to apply in one and the same process plane, for example in a metallization plane for producing conductor tracks in a high-volt smart power circuit, in which conductor tracks (12,13,14) with different potentials are provided. The method improves the process for checking faults, is economic and results in savings being made in terms of area on the semiconductor wafer.
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