| 摘要 |
A digital microprocessor device (2) has: a central processing unit; a memory (8); and an output signal module (4). The output signal module comprises: a counter (6) arranged to count to a predetermined count value; and at least one comparator (10a, 10b, 10c) arranged to change an output signal (14a, 14b, 14c) from a first output state to a second output state when the counter reaches a predetermined comparator value. The output signal module is arranged to load automatically from the memory at least one parameter selected from the group comprising: the predetermined count value, the predetermined comparator value and the first output state or the second output state, without receipt of an instruction from the central processing unit. |
